 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| TDA7575B 2 x 75W multifunction dual-bridge power amplifier with integrated digital diagnostics Features Multipower bcd technology MOSFET output power stage DMOS power output New Hi-efficiency (class AB) Single-channel 1 driving capability High output power capability 2x28W/4 @ 14.4V, 1KHz, 10% THD Max. output power 2x75W/2, 1x150W/1 Single-channel 1 driving capability - 84W undistorted power - Full I2C bus driving with 4 address possibilities: - St-by - Play/mute - Gain 12/26dB - Full digital diagnostic (AC and DC loads) Possibility to disable the I2C bus Differential inputs Full fault protection DC offset detection Two independent short circuit protections Diagnostic on clipping detector with selectable threshold (2%/10%) Clipping detector as diagnostic pin when I2C bus is disabled St-by/mute pins ESD protection Device summary Order code TDA7575B TDA7575BPD TDA7575BPDTR Package Flexiwatt 27 PowerSSO36 (slug up) PowerSSO36 (slug up) Packing Tube Tube Tape and reel PowerSO36 (Slug up) Flexiwatt 27 Description The TDA7575B is a new MOSFET dual bridge amplifier specially intended for car radio applications. Thanks to the DMOS output stage the TDA7575B has a very low distortion allowing a clear powerful sound. Among the features, its superior efficiency performance coming from the internal exclusive structure, makes it the most suitable device to simplify the thermal management in high power sets.The dissipated output power under average listening condition is in fact reduced up to 50% when compared to the level provided by conventional class AB solutions. This device is equipped with a full diagnostic array that communicates the status of each speaker through the I2C bus. The TDA7575B has also the possibility of driving loads down to 1 paralleling the outputs into a single channel. It is also possible to disable the I2C and control the TDA7575B by means of the usual ST-BY and MUTE pins. Table 1. October 2007 Rev 1 1/32 www.st.com 1 Contents TDA7575B Contents 1 2 Block and pins diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 2.2 2.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 5.2 5.3 5.4 5.5 5.6 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 1W capability setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 I2C abilitation setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 Software specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 6.1 Examples of bytes sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Diagnostics functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.1 7.2 7.3 7.4 7.5 7.6 7.7 Turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Permanent diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Output DC offset detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 AC diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Multiple faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Faults availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 I2C programming/reading sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8 9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 2/32 TDA7575B List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Address selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 IB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 IB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DB1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 DB2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Double fault table for turn on diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3/32 List of figures TDA7575B List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. (4 - SINE) Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Quiescent drain current vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output power vs. supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Distortion vs. output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Distortion vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Distortion vs. output voltage (LD mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Cross talk vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Cross talk vs. frequency (LD mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 CMRRR vs. frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output attenuation vs. supply voltage (vs. dependent muting) . . . . . . . . . . . . . . . . . . . . . . 13 Output attenuation vs. mute pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power dissipation vs. output power 13 Power dissipation vs. output power (2 - SINE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power dissipation vs. average output power (Audio program simulation, 4) . . . . . . . . . . 14 Power dissipation vs. average output power (Audio program simulation, 2) . . . . . . . . . . 14 ITU R-ARM frequency response, weighting filter for transient pop. . . . . . . . . . . . . . . . . . . 14 Application circuit (TDA7575B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application circuit (TDA7575BPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Data validity on the I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Timing diagram on the I2C bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Timing acknowledge clock pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Turn - on diagnostic: working principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SVR and output behavior - case 1: without turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . . 23 SVR and output pin behavior - case 2: with turn-on diagnostic . . . . . . . . . . . . . . . . . . . . . 24 Short circuit detection thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Load detection thresholds - high gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Load detection thresholds - high gain setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Restart timing without diagnostic enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Restart timing with diagnostic enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Current detection high: Load impedance |Z| vs. output peak voltage. . . . . . . . . . . . . . . . . 27 Current detection low: Load impedance |Z| vs. output peak voltage . . . . . . . . . . . . . . . . . 27 PowerSO36 (slug up) mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . 29 Flexiwatt 27 mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4/32 TDA7575B Block and pins diagrams 1 Block and pins diagrams Figure 1. Block diagram ADDRESS A B VS CLK DATA VCC CD_OUT I2CBUS IN1+ CLIP DETECTOR OUT1+ IN1OUT1SHORT CIRCUIT PROTECTION IN2+ OUT2+ IN2SHORT CIRCUIT PROTECTION OUT2- I2C EN SVR ST-BY/HE S_GND PW_GND TAB 1 MUTE D01AU1269 Figure 2. Pin connections (top view) 27 TAB PWGND A OUT2+ N.C. OUT2VCC IN2+ IN2I2CEN 1 CD_OUT SVR CK DATA SGND STT-BY MUTE IN1IN1+ VCC OUT1N.C. OUT1+ B PWGND TAB D03IN1512 OUT1+ OUT1+ VCC VCC B PWGND PWGND OUT1OUT1OUT2OUT2PWGND PWGND A VCC VCC OUT2+ OUT2+ 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 D01AU1270 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 TAB IN1+ IN1MUTE ST_BY SGND DATA CK N.C. N.C. N.C. N.C. SVR CD-OUT 1-OHM I2C-EN IN2IN2+ 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 PowerSO-36 (slug up) Flexiwatt 27 5/32 Electrical specifications TDA7575B 2 2.1 Table 2. Symbol Vop VS Vpeak VCK VDATA IO IO Ptot Tstg, Tj Electrical specifications Absolute maximum ratings Absolute maximum ratings Parameter Operating supply voltage DC supply voltage Peak supply voltage (for t = 50ms) CK pin voltage Data pin voltage Output peak current (not repetitive t = 100ms) Output peak current (repetitive f > 10Hz) Power dissipation Tcase = 70C Storage and junction temperature Value 18 28 50 6 6 8 6 86 -55 to 150 Unit V V V V V A A W C 2.2 Table 3. Symbol Rth j-case Thermal data Thermal data Parameter Thermal resistance junction to case Max PowerSO36 1 Flexiwatt 27 1 Unit C/W 2.3 Table 4. Symbol Electrical characteristics Electrical characteristics (VS = 14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified) Parameter Test condition Min. Typ. Max. Unit Power amplifier VS Id Supply voltage range Total quiescent drain current Max. power(1) THD = 10% THD = 1%; BTL mode RL = 2; THD 10% RL = 2; THD 1% RL = 2; Max. power(1) 8 50 35 25 45 70 130 40 28 22 50 37 75 18 200 V mA W W Po Output power W 6/32 TDA7575B Table 4. Symbol Electrical specifications Electrical characteristics (continued) (VS = 14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified) Parameter Test condition Single channel configuration (1 pin >2.5V); RL = 1; THD 3% Max. power(1) PO = 1-12W; STD MODE HE MODE; PO = 1-2W HE MODE; PO = 4-8W Min. Typ. Max. Unit Po Output power 80 140 84 150 0.03 0.03 0.5 0.15 0.03 0.02 0.1 0.1 0.5 0.5 0.1 W % % % % dB THD Total harmonic distortion PO = 1-12W, f = 10kHz RL = 2; HE MODE; Po = 3W Single channel configuration (1 pin >2.5V); RL = 1; PO = 430W CT RIN GV1 GV1 GV2 GV2 EIN1 EIN2 SVR BW ASB ISB AM VOS VAM CMRR VMC SR Cross talk Input impedance Voltage gain 1 (default) Voltage gain match 1 Voltage gain 2 Voltage gain match 2 Output noise voltage gain 1 Output noise voltage gain 2 Supply voltage rejection Power bandwidth Stand-by attenuation Stand-by current consumption Mute attenuation Offset voltage Min. supply mute threshold Input CMRR Rg = 600; PO = 1W 60 60 25 -1 11 -1 75 100 26 0 12 0 40 15 130 27 1 13 1 60 25 K dB dB dB dB V V dB KHz Rg = 600; Gv = 26dB filter 20 to 22kHz Rg = 600; Gv = 12dB filter 20 to 22kHz f = 100Hz to 10kHz; Vr = 1Vpk; Rg = 600 (-3dB) 50 100 90 Vst-by = 0V 80 Mute & play -45 7 VCM = 1Vpk-pk; Rg = 0 56 60 100 2 90 0 7.5 60 1 45 8 10 dB A dB mV V dB Vrms V/s +10 +10 mV mV Maximum common mode input f = 1kHz level Slew rate During mute ON/OFF output offset voltage During St-By ON/OFF output offset voltage ITU R-ARM weighted see Figure 23 1.5 -10 -10 4 VOS 7/32 Electrical specifications Table 4. Symbol TON TOFF VOFF VSB VHE IO Vm Vm Im Im VI2C VI2C I 2C TDA7575B Electrical characteristics (continued) (VS = 14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified) Parameter Turn on delay Turn off delay St-by pin for st-by St-by pin for standard bridge St-by pin for Hi-eff St-by pin current St-by pin current Mute pin voltage for mute mode Mute pin voltage for play mode Mute pin current (st_by) Mute pin current (operative) I2C pin voltage for I2C disabled I2C I2C I2C pin voltage for I2C enabled 0V < I2C I2C EN < 18V, Vstby < 1.5V Vmute = 0V, Vstby < 1.5V 0V < Vmute < 18V, Vstby > 3.5V 0 2.5 -5 7 0 2.5 0V < 1 <18V, Vstby < 1.5V 1 <18V, Vstby > 3.5V Low logic level A pin voltage High logic level A pin current (st-by) A pin current (operative) B pin voltage 0V < A < 18V, Vstby < 1.5V A<18V, Vstby > 3.5V Low logic level High logic level B pin current (st-by) B pin current (operative) Thermal warning Thermal protection intervention Clip pin high leakage current Clip pin low sink current Clip detect THD level D0 (IB1) = 1 5 10 15 % I2 C bus; ST-BY Pin low puts the device in ST-BY condition.(see "prog" for more details) CD off, 0V < VCD < 5.5V CD on; VCD < 300mV D0 (IB1) = 0 -15 1 0.8 1.3 2.5 0V < B < 18V, Vstby < 1.5V B < 18V, Vstby > 3.5V -5 7 0 2.5 -5 7 0 2.5 -5 7 0 11 150 170 0 15 0 11 0 11 0 11 1.5 < Vstby/HE < 18V Vstby < 1.5V Test condition D2 (IB1) 0 to 1 D2 (IB1) 1 to 0 0 3.5 7 7 -10 0 3.5 -5 0 65 160 0 Min. Typ. 15 15 Max. 40 40 1.5 5 18 200 10 1.5 18 5 100 1.5 18 5 15 1.5 18 5 15 1.5 18 5 15 1.5 18 5 15 Unit ms ms V V V A A V V A A V V A A V V A A V V A A V V A A C C A mA % pin current (st-by) pin current (operative) I2C V1 V1 I1 I1 La Ha Ia Ia Lb Hb Ib Ib TW TPI ICDH ICDL CD EN <18V, Vstby>3.5V 1 pin voltage for 2ch mode 1 pin voltage for 1 mode 1 pin current (st-by) 1 pin current (operative) (*) ST-BY Pin high enables 8/32 TDA7575B Table 4. Symbol Electrical specifications Electrical characteristics (continued) (VS = 14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified) Parameter Test condition Min. Typ. Max. Unit Turn on diagnostics (Power amplifier mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorted load det. Open load det. Normal load det. 130 1.5 70 Power amplifier in st-by condition 1.2 V Pvs Vs -0.9 V Pnop 1.8 Vs -1.5 V Lsc Lop Lnop 0.5 TUrn on diagnostics (Line driver mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Shorted load det. Open load det. Normal load det. 400 4.5 200 Power amplifier in st-by 1.8 Vs -1.5 V Vs -0.9 1.2 V Pvs V Pnop Lsc Lop Lnop 1.5 Permanent diagnostics (Power amplifier mode or line driver mode) Pgnd Short to GND det. (below this limit, the Output is considered in Short Circuit to GND) Short to Vs det. (above this limit, the Output is considered in Short Circuit to VS) Normal operation thresholds.(Within these limits, the Output is considered without faults). Pow. amp. mode Lsc Shorted load det. Line driver mode 1.5 Power amplifier in Mute or Play condition, one or more short circuits protection activated Vs 0.9 1.2 V Pvs V Pnop 1.8 Vs -1.5 V 0.5 9/32 Electrical specifications Table 4. Symbol VO INLH INLL IOLH IOLL I2 TDA7575B Electrical characteristics (continued) (VS = 14.4V; f=1KHz; RL=4; Tamb= 25C unless otherwise specified) Parameter Offset detection Normal load current detection Normal load current detection Open load current detection Open load current detection Test condition Power amplifier in play condition AC input signals = 0 VO < (VS - 5)pk IB2 (D0) = 0 VO < (VS - 5)pk IB2 (D0) = 1 VO < (VS - 5)pk IB2 (D0) = 0 VO < (VS - 5)pk IB2 (D0) =1 Min. 1.5 500 250 250 125 Typ. 2 Max. 2.5 Unit V mA mA mA mA C bus interface fSCL VIL VIH Clock frequency Input low voltage Input high voltage 2.3 400 1.5 KHz V V 1. Saturated sqare wave output. 10/32 TDA7575B Electrical characteristics curves 3 Figure 3. Id (mA) 160 150 140 130 120 110 100 90 80 70 8 Electrical characteristics curves Quiescent drain current vs. supply voltage Figure 4. Po (W) 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 Output power vs. supply voltage Vi=0 NO LOADS RL=4 Ohm f=1 KHz Po-max THD=10% THD=1% 10 12 Vs (V) 14 16 18 8 9 10 11 12 13 14 Vs (V) 15 16 17 18 Figure 5. Po (W) 130 120 110 100 90 80 70 60 50 40 30 20 10 0 8 Output power vs. supply voltage Figure 6. Po (W) 130 120 110 100 90 80 70 60 50 40 30 20 10 0 18 Output power vs. supply voltage Po-max Po-max RL=2 Ohm f=1 KHz THD=10% RL=2 Ohm f=1 KHz THD=10% THD=1% THD=1% 9 10 11 12 13 Vs (V) 14 15 16 17 8 9 10 11 12 13 Vs (V) 14 15 16 17 18 Figure 7. 10 Distortion vs. output power Figure 8. 10 Distortion vs. output power THD (%) HI-EFF mode Vs=14.4V RL=4 Ohm THD (%) HI-EFF mode Vs=14.4V RL=2 Ohm 1 f=10 KHz 1 f=10 KHz 0.1 f=1 KHz 0.1 f=1 KHz 0.01 0.1 1 Po (W) 0.01 10 100 0.1 1 Po (W) 10 100 11/32 Electrical characteristics curves TDA7575B Figure 9. Distortion vs. output power Figure 10. Distortion vs. output power THD (%) 10 THD (%) 10 STD mode Vs=14.4V RL=4 Ohm f=10 KHz 1 1 STD mode Vs=14.4V RL=2 Ohm f=10 KHz 0.1 f=1 KHz 0.1 f=1 KHz 0.01 0.01 0.001 0.1 1 Po (W) 0.001 10 100 0.1 1 Po (W) 10 100 Figure 11. Distortion vs. output power THD (%) STD mode Vs=14.4V RL=1 Ohm Figure 12. Distortion vs. frequency THD (%) 10 10 Vs=14.4V STD mode 1 - 40W 2 - 24W 4 - 12W 1 f=10 KHz 1 0.1 0.1 f=1 KHz 0.01 0.01 0.1 1 Po (W) 0.001 10 100 10 100 1000 f (Hz) 10000 100000 Figure 13. Distortion vs. output voltage (LD mode) THD (%) Figure 14. Cross talk vs. frequency 10 LD mode Vs=14.4V RL=100 Ohm -20 -30 -40 -50 CROSSTALK (dB) STD mode RL=2 Ohm Rg=600 Ohm 1 0.1 f=10 KHz -60 -70 -80 f=1 KHz 0.01 -90 -100 9 10 11 12 0.001 0 1 2 3 4 5 6 Vout 7 8 10 100 1000 f (Hz) 10000 100000 12/32 TDA7575B Electrical characteristics curves Figure 15. Cross talk vs. frequency (LD mode) -20 -30 -40 -50 -60 -70 -80 -90 -100 10 100 1000 f (Hz) CROSSTALK (dB) Figure 16. CMRRR vs. frequency CMRR (dB) -40 LD mode Vo=1 Vrms RL=100 Ohm Vcm=1 Vpp -50 -60 -70 10000 100000 10 100 1000 f (Hz) 10000 100000 Figure 17. Output attenuation vs. supply voltage (vs. dependent muting) OUT ATTN (dB) Figure 18. Output attenuation vs. mute pin voltage OUT ATTN (dB) 20 0 -20 -40 -60 0 dB=1 Vrms RL=2 Ohm 20 0 -20 -40 -60 0 dB=2 Vrms RL=2 Ohm -80 -100 -120 5 6 7 Vs (V) -80 -100 8 9 10 1 1.5 2 2.5 3 3.5 4 MUTE PIN V (V) Figure 19. Power dissipation vs. output power Figure 20. Power dissipation vs. output power (4 - SINE) (2 - SINE) Ptot (W) Ptot (W) 35 30 25 20 Vs=14.4V RL=2 x 4 Ohm f=1 KHz STD 60 50 40 30 Vs=14.4V RL:=2 x 2 Ohm f=1 KHz STD 15 10 5 0 0.1 1 Po (W) 20 HI-EFF HI-EFF 10 0 10 100 0.1 1 Po (W) 10 100 13/32 Electrical characteristics curves TDA7575B Figure 21. Power dissipation vs. average output power (Audio program simulation, 4) Ptot (W) 30 25 20 15 STD Vs=14 V RL=2 x 4 GAUSSIAN NOISE CLIP START Figure 22. Power dissipation vs. average output power (Audio program simulation, 2) Ptot (W) 35 30 25 20 15 10 HI-EFF CLIP START Vs=14V RL=2 x 2 Ohm GAUSSIAN NOISE STD HI-EFF 10 5 0 0 1 2 Po (W) 3 4 5 5 0 0 1 2 3 4 5 Po (W) 6 7 8 9 10 Figure 23. ITU R-ARM frequency response, weighting filter for transient pop Output attenuation (dB) 10 0 -10 -20 -30 -40 -50 10 100 1000 Hz 10000 100000 AC00343 14/32 TDA7575B Application circuit 4 Application circuit Figure 24. Application circuit (TDA7575B) I2C BUS VS CD_OUT A B CLK DATA C7 0.1F C8 2200F R1 47K V VCC 25 3 14 13 7-21 16 C1 0.22F IN1+ 8 4 IN1C2 0.22F 9 6 OUT1OUT1+ C3 0.22F IN2+ 20 19 C4 0.22F 15 11 12 2-26 S_GND C5 10F D05AU1615 OUT2+ 24 22 OUT2I2C BUS ENABLE IN2- 1 TAB 17 18 10 PW_GND MUTE C6 1F R2 47K ST-BY/HE 1 SETTING Figure 25. Application circuit (TDA7575BPD) I2C BUS VS CD_OUT A B CLK DATA C7 0.1F C8 2200F R1 47K V VCC 23 32 8 7 21-2-33-34 14 C1 0.22F IN1+ 2 35-36 IN1C2 0.22F 3 28-29 OUT1OUT1+ C3 0.22F IN2+ 18 17 C4 0.22F 13 5 6 24-25-30-31 S_GND C5 10F D05AU1616 OUT2+ 19-20 26-29 OUT2I2C BUS ENABLE IN2- 1 TAB 15 16 4 PW_GND MUTE C6 1F R2 47K ST-BY/HE 1 SETTING 15/32 I2C bus interface TDA7575B 5 I2C bus interface Data transmission from microprocessor to the TDA7575B and vice versa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). 5.1 Data validity As shown by Figure 26, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW. 5.2 Start and stop conditions As shown by Figure 27 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. 5.3 Byte format Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. 5.4 Acknowledge The transmitter(*) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see Figure 28). The receiver(**) the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. (*) Transmitter = master (P) when it writes an address to the TDA7575B = slave (TDA7575B) when the P reads a data byte from TDA7575B (**) Receiver = slave (TDA7575B) when the P writes an address to the TDA7575B = master (P) when it reads a data byte from TDA7575B Figure 26. Data validity on the I2C bus SDA SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED D99AU1031 16/32 TDA7575B Figure 27. Timing diagram on the I2C bus SCL I2C bus interface I2CBUS SDA D99AU1032 START STOP Figure 28. Timing acknowledge clock pulse SCL 1 2 3 7 8 9 SDA MSB START D99AU1033 ACKNOWLEDGMENT FROM RECEIVER 5.5 1 capability setting It is possible to drive 1 load paralleling the outputs into a single channel. In order to implement this feature, outputs are to be connected on the board as follows: OUT1+ (PIN35 and PIN36) shorted to OUT2+ (PIN19 and PIN20) OUT1- (PIN28 and PIN29) shorted to OUT2- (PIN26 and PIN27). It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize THD distortion. It is also recommended to control the maximum mismatch impedance between VCC pins (PIN21/PIN22 respect to PIN33/PIN34) and between PWGND pins (PIN24/PIN25 respect to PIN30/PIN31), mismatch that must not exceed a value of 20 m. With 1 feature settled the active input is IN2 (PIN17 and PIN18), therefore IN1 pins should be let floating. It is possible to set the load capability acting on 1 pin as follows: 1 PIN (PIN15) < 1.5V: two channels mode (for a minimum load of 2) 1 PIN (PIN15) > 2.5V: one channel mode (for 1 load). IT IS TO REMEMBER THAT 1 OHM FUNCTION IS A HARDWARE SELECTION. Therefore it is recommended to leave 1 PIN floating or shorted to GND to set the two channels mode configuration, or to short 1 PIN to VCC to set the one channel (1) configuration. 5.6 I2C abilitation setting It is possible to disable the I2C interface by acting on I2C PIN (PIN16) and control the TDA7575B by means of the usual ST-BY and MUTE pins. In order to activate or deactivate this feature, I2C PIN must be set as follows: 17/32 I2C bus interface I2C PIN (PIN16) < 1.5V: I2C bus interface deactivated I2C PIN (PIN16) > 2.5V: I2C bus interface activated TDA7575B It is also possible to let I2C PIN floating to deactivate the I2C bus interface, or to short I2C PIN to VCC to activate it. In particular: I2C ENABLED: I2C pin (PIN16) > 2.5V - - - STD MODE: Vstby (PIN5) > 3.5V, IB2(D1)=0 HE MODE: Vstby (PIN5) > 3.5V, IB2(D1)=1 PLAY MODE: Vmute (pin 4) >3.5V, IB1 (D2) = 1 The amplifier can always be switched off by putting Vstby to 0V, but with I2C enabled it can be turn on only through I2C (with Vstby>3.5V). I2C DISABLED: I2C pin (PIN16) < 1.5V - - - STD MODE: 3.5V < st-by (PIN5) < 5 HE MODE: Vstby (PIN5) > 7V PLAY MODE: Vmute (pin 4) >3.5V For both STD and HE MODE the play/mute mode can be set acting on Vmute pin. When I2C BUS is disabled, when a fault is detected PIN 14 (CD-OUT) is pulled down by the internal logic circuitry. The faults detected are the short circuit to ground, to VCC and across the load (after an aver current detection). 18/32 TDA7575B Software specifications 6 Software specifications All the functions of the TDA7575B are activated by I2C interface. The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from P to TDA7575B) or read instruction (from TDA7575B to P). Table 5. A6 A5 A4 A3 A2 A1 A0 R/W Address selection 1 1 0 1 0 B A X If R/W = 0, the P sends 2 "Instruction Bytes": IB1 and IB2. Table 6. D7 D6 D5 D4 D3 D2 D1 D0 IB1 0 Diagnostic enable (D6 = 1) Diagnostic defeat (D6 = 0) Offset Detection enable (D5 = 1) Offset Detection defeat (D5 = 0) Gain = 26dB (D4 = 0) Gain = 12dB (D4 = 1) 0 Mute (D2 = 0) Unmute (D2 = 1) 0 CD 2% (D0 = 0) CD 10% (D0 = 1) 19/32 Software specifications Table 7. D7 D6 D5 D4 D3 D2 D1 D0 TDA7575B IB2 0 0 0 Stand-by on - Amplifier not working - (D4 = 0) Stand-by off - Amplifier working - (D4 = 1) Power Amplifier Mode Diagnostic (D3 = 0); Line Driver Mode Diagnostic (D3 = 1) Current Detection Diagnostic Enabled (D2 = 1) Current Detection Diagnostic Defeat (D2 = 0) Power amplifier working in standard mode (D1 = 0) Power amplifier working in high efficiency mode (D1 = 1) Current Detection Threshold HIGH (D7 =0) Current Detection Threshold LOW (D7 =1) If R/W = 1, the TDA7575B sends 2 "Diagnostics Bytes" to P: DB1 and DB2. Table 8. D7 D6 DB1 Thermal warming (if Tchip 150C, D7 = 1) Diag. cycle not activated or not terminated (D6 = 0) Diag. cycle terminated (D6 = 1) Channel 1 current detection IB2 (D0) = 0 Output peak current < 250 mA - Open load (D5 = 1) Output peak current > 500 mA - Normal load (D5 = 0) Channel 1 Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) Channel 1 Normal load (D3 = 0) Short load (D3 = 1) Channel 1 Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Offset diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) Channel 1 No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel 1 No short to GND (D1 = 0) Short to GND (D1 = 1) Channel LF current detection IB2 (D0) = 1 Output peak current < 125 mA - Open load (D5 = 1) Output peak current > 250 mA - Normal load (D5 = 0) D5 D4 D3 D2 D1 D0 20/32 TDA7575B Table 9. D7 D6 Software specifications DB2 Offset detection not activated (D7 = 0) Offset detection activated (D7 = 1) Current sensor not activated (D6 = 0) Current sensor activated (D6 = 1) Channel LR Current detection IB2 (D0) = 0 Output peak current < 250 mA - Open load (D5 = 1) Output peak current > 500 mA - Normal load (D5 = 0) Channel 2 Turn-on diagnostic (D4 = 0) Permanent diagnostic (D4 = 1) Channel 2 Normal load (D3 = 0) Short load (D3 = 1) Channel 2 Turn-on diag.: No open load (D2 = 0) Open load detection (D2 = 1) Permanent diag.: No output offset (D2 = 0) Output offset detection (D2 = 1) Channel 2 No short to Vcc (D1 = 0) Short to Vcc (D1 = 1) Channel 2 No short to GND (D1 = 0) Short to GND (D1 = 1) Channel LR Current detection IB2 (D0) = 1 Output peak current < TBD mA - Open load (D5 = 1) Output peak current > TBD mA - Normal load (D5 = 0) D5 D4 D3 D2 D1 D0 21/32 Software specifications TDA7575B 6.1 Examples of bytes sequence 1 - Turn-On diagnostic - Write operation Start Address byte with D0 = 0 L ACK IB1 with D6 = 1 ACK IB2 ACK STOP 2 - Turn-On diagnostic - Read operation Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP The delay from 1 to 2 can be selected by software, starting from T.B.D. ms 3a - Turn-On of the power amplifier with mute on, diagnostic defeat. Start Address byte with D0 = 0 ACK IB1 X000XXXX ACK IB2 XXX1XX1X ACK STOP 3b - Turn-Off of the power amplifier Start Address byte with D0 = 0 ACK IB1 X0XXXXXX ACK IB2 XXX0XXXX ACK STOP 4 - Offset detection procedure enable Start Address byte with D0 = 0 ACK IB1 XX1XX1XX ACK IB2 XXX1XXXX ACK STOP 5 - Offset detection procedure stop and reading operation (the results are valid only for the offset detection bits (D2 of the bytes DB1, DB2, DB3, DB4). Start Address byte with D0 = 1 ACK DB1 ACK DB2 ACK STOP The purpose of this test is to check if a D.C. offset (2V typ.) is present on the outputs, produced by input capacitor with anomalous leakage current or humidity between pins. The delay from 4 to 5 can be selected by software, starting from T.B.D. ms 22/32 TDA7575B Diagnostics functional description 7 7.1 Diagnostics functional description Turn-on diagnostic It is activated at the turn-on (stand-by out) under I2C bus request. Detectable output faults are: - - - - SHORT TO GND SHORT TO Vs SHORT ACROSS THE SPEAKER OPEN SPEAKER To verify if any of the above misconnections are in place, a subsonic (inaudible) current pulse (Figure 29) is internally generated, sent through the speaker(s) and sunk back. The Turn On diagnostic status is internally stored until a successive diagnostic pulse is requested (after a I2C reading). If the "stand-by out" and "diag. enable" commands are both given through a single programming step, the pulse takes place first (power stage still in stand-by mode, low, outputs = high impedance). Afterwards, when the Amplifier is biased, the PERMANENT diagnostic takes place. The previous Turn On state is kept until a short appears at the outputs. Figure 29. Turn - on diagnostic: working principle Vs~5V Isource I (mA) Isource Isink CH+ CHIsink ~100mS Measure time t (ms) Fig. Figure 30 and Figure 31 show SVR and OUTPUT waveforms at the turn-on (stand-by out) with and without Turn-on diagnostic. Figure 30. SVR and output behavior - case 1: without turn-on diagnostic Vsvr Out Permanent diagnostic acquisition time (100mS Typ) Bias (power amp turn-on) Diagnostic Enable (Permanent) t FAULT event Permanent Diagnostics data (output) permitted time Read Data I2CB DATA 23/32 Diagnostics functional description Figure 31. SVR and output pin behavior - case 2: with turn-on diagnostic Vsvr Out Turn-on diagnostic acquisition time (100mS Typ) TDA7575B Permanent diagnostic acquisition time (100mS Typ) Diagnostic Enable (Turn-on) Turn-on Diagnostics data (output) permitted time Diagnostic Enable (Permanent) FAULT event t I2CB DATA Bias (power amp turn-on) permitted time Read Data Permanent Diagnostics data (output) permitted time The information related to the outputs status is read and memorized at the end of the current pulse top. The acquisition time is 100 ms (typ.). No audible noise is generated in the process. As for SHORT TO GND / Vs the fault-detection thresholds remain unchanged from 26 dB to 12 dB gain setting. They are as follows: Figure 32. Short circuit detection thresholds S.C. to GND x Normal Operation x S.C. to Vs 0V 1.2V 1.8V VS-1.5V VS-0.9V D02AU1341 VS Concerning SHORT ACROSS THE SPEAKER / OPEN SPEAKER, the threshold varies from 26 dB to 12 dB gain setting, since different loads are expected (either normal speaker's impedance or high impedance). The values in case of 26 dB gain are as follows: Figure 33. Load detection thresholds - high gain setting S.C. across Load x Normal Operation x Open Load 0V 0.5 1.5 70 130 D01AU1254 Infinite If the Line-Driver mode (Gv= 12 dB and Line Driver Mode diagnostic = 1) is selected, the same thresholds will change as follows: Figure 34. Load detection thresholds - high gain setting S.C. across Load x Normal Operation x Open Load 0 1.5 4.5 200 400 D01AU1252 infinite 24/32 TDA7575B Diagnostics functional description 7.2 Permanent diagnostics Detectable conventional faults are: - - - - 1. SHORT TO GND SHORT TO Vs SHORT ACROSS THE SPEAKER OUTPUT OFFSET DETECTION The following additional features are provided: The TDA7575B has 2 operating statuses: RESTART mode. The diagnostic is not enabled. Each audio channel operates independently from each other. If any of the a.m. faults occurs, only the channel(s) interested is shut down. A check of the output status is made every 1 ms (fig. 30). Restart takes place when the overload is removed. DIAGNOSTIC mode. It is enabled via I2C bus and self activates if an output overload (such to cause the intervention of the short-circuit protection) occurs to the speakers outputs. Once activated, the diagnostics procedure develops as follows (fig. 31): - To avoid momentary re-circulation spikes from giving erroneous diagnostics, a check of the output status is made after 1ms: if normal situation (no overloads) is detected, the diagnostic is not performed and the channel returns back active. Instead, if an overload is detected during the check after 1 ms, then a diagnostic cycle having a duration of about 100 ms is started. After a diagnostic cycle, the audio channel interested by the fault is switched to RESTART mode. The relevant data are stored inside the device and can be read by the microprocessor. When one cycle has terminated, the next one is activated by an I2C reading. This is to ensure continuous diagnostics throughout the carradio operating time. To check the status of the device a sampling system is needed. The timing is chosen at microprocessor level (over than half a second is recommended). 2. - - - Figure 35. Restart timing without diagnostic enable (permanent) each 1ms time, a sampling of the fault is done Out 1-2mS 1mS 1mS 1mS 1mS Overcurrent and short circuit protection intervention (i.e. short circuit to GND) t Short circuit removed Figure 36. Restart timing with diagnostic enable (permanent) 1mS 100mS 1mS 1mS t Overcurrent and short circuit protection intervention (i.e. short circuit to GND) Short circuit removed 25/32 Diagnostics functional description TDA7575B 7.3 Output DC offset detection Any DC output offset exceeding +/- 2 V are signalled out. This inconvenient might occur as a consequence of initially defective or aged and worn-out input capacitors feeding a DC component to the inputs, so putting the speakers at risk of overheating. This diagnostic has to be performed with low-level output AC signal (or Vin = 0). The test is run with selectable time duration by microprocessor (from a "start" to a "stop" command): - - START = Last reading operation or setting IB1 - D5 - (OFFSET enable) to 1 STOP = Actual reading operation Excess offset is signalled out if persistent throughout the assigned testing time. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. 7.4 AC diagnostic It is targeted at detecting accidental disconnection of tweeters in 2-way speaker and, more in general, presence of capacitively (AC) coupled loads. This diagnostic is based on the notion that the overall speaker's impedance (woofer + parallel tweeter) will tend to increase towards high frequencies if the tweeter gets disconnected, because the remaining speaker (woofer) would be out of its operating range (high impedance). The diagnostic decision is made according to peak output current thresholds, and it is enabled by setting (IB2-D2) = 1. Two different detection levels are available: - HIGH CURRENT THRESHOLD IB2 (D7) = 0 Iout > 500mApk = NORMAL STATUS Iout < 250mApk = OPEN TWEETER - LOW CURRENT THRESHOLD IB2 (D7) = 1 Iout > 250mApk = NORMAL STATUS Iout < 125mApk = OPEN TWEETER To correctly implement this feature, it is necessary to briefly provide a signal tone (with the amplifier in "play") whose frequency and magnitude are such to determine an output current higher than 500mApk with IB2(D7)=0 (higher than 250mApk with IB2(D7)=1) in normal conditions and lower than 250mApk with IB2(D7)=0 (lower than 125mApk with IB2(D7)=1) should the parallel tweeter be missing. The test has to last for a minimum number of 3 sine cycles starting from the activation of the AC diagnostic function IB2 26/32 TDA7575B Diagnostics functional description are recommended for their negligible acoustic impact and also to maximize the impedance module's ratio between with tweeter-on and tweeter-off. Figure 37 shows the Load Impedance as a function of the peak output voltage and the relevant diagnostic fields. This feature is disabled if any overloads leading to activation of the short-circuit protection occurs in the process. Figure 37. Current detection high: Load impedance |Z| vs. output peak voltage Load |z| (Ohm) 50 Iout (peak) <250mA 30 20 Low current detection area (Open load) D5 = 1 of the DBx byres Iout (peak) >500mA 10 IB2(D0) = 0 5 3 2 High current detection area (Normal load) D5 = 0 of the DBx bytes 1 1 2 3 4 5 6 7 8 Vout (Peak) Figure 38. Current detection low: Load impedance |Z| vs. output peak voltage Load |z| (Ohm) 50 Iout (peak) <125mA 30 20 Low current detection area (Open load) D5 = 1 of the DBx byres Iout (peak) >250mA 10 IB2(D0) = 1 5 3 2 High current detection area (Normal load) D5 = 0 of the DBx bytes 1 0.5 1 1.5 2 2.5 3 3.5 4 Vout (Peak) 7.5 Multiple faults When more misconnections are simultaneously in place at the audio outputs, it is guaranteed that at least one of them is initially read out. The others are notified after successive cycles of I2C reading and faults removal, provided that the diagnostic is enabled. This is true for both kinds of diagnostic (Turn on and Permanent). The table below shows all the couples of double-fault possible. It should be taken into account that a short circuit with the 4 speaker unconnected is considered as double fault. 27/32 Diagnostics functional description Table 10. Double fault table for turn on diagnostic S. GND (sc) S. GND (sc) S. GND (sk) S. Vs S. Across L. Open L. S. GND / / / / S. GND (sk) S. GND S. GND / / / S. Vs S. Vs + S. GND S. Vs S. Vs / / S. Across L. S. GND S. GND S. Vs S. Across L. / TDA7575B Open L. S. GND Open L. (*) S. Vs N.A. Open L. (*) S. GND (so) / S. GND (sk) in the above table make a distinction according to which of the 2 outputs is shorted to ground (test-current source side= so, test-current sink side = sk). More precisely, in both the Channels SO = CH+, and SK = CH-. In Permanent Diagnostic the table is the same, with only a difference concerning Open Load(*), which is not among the recognizable faults. Should an Open Load be present during the device's normal working, it would be detected at a subsequent Turn on Diagnostic cycle (i.e. at the successive Car Radio Turn on). 7.6 Faults availability All the results coming from I2C bus, by read operations, are the consequence of measurements inside a defined period of time. If the fault is stable throughout the whole period, it will be sent out. This is true for DC diagnostic (Turn on and Permanent), for Offset Detector. To guarantee always resident functions, every kind of diagnostic cycles (Turn on, Permanent, Offset) will be reactivate after any I2C reading operation. So, when the micro reads the I2C, a new cycle will be able to start, but the read data will come from the previous diag. cycle (i.e. The device is in Turn On state, with a short to Gnd, then the short is removed and micro reads I2C. The short to Gnd is still present in bytes, because it is the result of the previous cycle. If another I2C reading operation occurs, the bytes do not show the short). In general to observe a change in Diagnostic bytes, two I2C reading operations are necessary. 7.7 I2C programming/reading sequences A correct turn on/off sequence respectful of the diagnostic timings and producing no audible noises could be as follows (after battery connection): - - TURN-ON: (STAND-BY OUT + DIAG ENABLE) --- 500 ms (min) --- MUTING OUT TURN-OFF: MUTING IN --- 20 ms --- (DIAG DISABLE + STAND-BY IN) Car Radio Installation: DIAG ENABLE (write) --- 200ms --- I2C read (repeat until All faults disappear). - - OFFSET TEST: Device in Play (no signal) -OFFSET ENABLE - 30ms - I2C reading (repeat I2C reading until high-offset message disappears). 28/32 TDA7575B Package information 8 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 39. PowerSO36 (slug up) mechanical data and package dimensions DIM. A A2 A4 A5 a1 b c D D1 D2 E E1 E2 E3 E4 e e3 G H h L N s MIN. 3.25 3.1 0.8 0.030 0.22 0.23 15.8 9.4 1 13.9 10.9 5.8 2.9 0.65 11.05 0 15.5 0.8 0.075 15.9 1.1 1.1 10 8 0 0.61 0.031 14.5 11.1 2.9 6.2 3.2 0.547 0.429 0.228 0.114 0.026 0.435 0.003 0.625 0.043 0.043 10 8 mm TYP. MAX. 3.43 3.2 1 -0.040 0.38 0.32 16 9.8 MIN. 0.128 0.122 0.031 0.0011 0.008 0.009 0.622 0.37 0.039 0.57 0.437 0.114 0.244 1.259 inch TYP. MAX. 0.135 0.126 0.039 -0.0015 0.015 0.012 0.630 0.38 OUTLINE AND MECHANICAL DATA 0.2 0.008 PowerSO36 (SLUG UP) (1) "D and E1" do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006") (2) No intrusion allowed inwards the leads. 7183931 D 29/32 Package information Figure 40. Flexiwatt 27 mechanical data and package dimensions DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 25.75 28.90 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 26.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 1.05 0.42 0.57 1.20 26.25 29.30 MIN. 0.175 0.070 0.029 0.014 0.031 1.014 1.139 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 1.023 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 0.041 0.016 0.022 0.047 1.033 1.153 TDA7575B OUTLINE AND MECHANICAL DATA 22.07 18.57 15.50 7.70 22.87 19.37 15.90 7.95 0.869 0.731 0.610 0.303 0.904 0.762 0.626 0.313 3.70 3.60 4.30 4.40 0.145 0.142 0.169 0.173 5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.) Flexiwatt27 (vertical) (1): dam-bar protusion not included (2): molding protusion included V C B V H H1 H3 O V3 H2 R3 R4 A L4 V1 N R2 R L L1 L2 L3 V1 V2 R2 L5 G G1 F R1 R1 R1 E FLEX27ME D Pin 1 M M1 7139011 30/32 TDA7575B Revision history 9 Revision history Table 11. Date 30-Oct-2007 Document revision history Revision 1 Initial release. Changes 31/32 TDA7575B Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2007 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 32/32 |
Price & Availability of TDA7575BPDTR
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |